1. Field of the Invention
The present invention relates to a nitride semiconductor device using a Group III nitride semiconductor and a manufacturing method thereof.
2. Description of Related Art
Conventionally, a power device using a silicon semiconductor is used for a power amplifier circuit, a power supply circuit, a motor drive circuit, or the like. However, from theoretical limitations of the silicon semiconductor, high withstand voltage, low resistance, and high speed of the silicon device have nearly reached their limits, which leads to difficulties in satisfying market needs.
Therefore, consideration has been given to the development of a nitride semiconductor device having characteristics such as high withstand voltage, high-temperature operation, a large current density, high-speed switching, low on-resistance, and the like.
FIG. 5 is a schematic sectional view for illustrating the structure of a conventional field-effect transistor (nitride semiconductor device) using a group III nitride semiconductor.
This field-effect transistor includes a sapphire substrate 81 and an n-p-n laminated structure 93 formed by an undoped GaN layer 82, an n-type GaN layer 83, a p-type GaN layer 84 and an n-type GaN layer 85 successively laminated from the side closer to the sapphire substrate 81. A mesa-like laminated portion 92 is formed in the laminated structure 93 by performing dry etching from the surface of the n-type GaN layer 85 up to an intermediate portion of the n-type GaN layer 83. The mesa-like laminated portion 92 has slopes 91 inclined at a prescribed angle with respect to the lamination interfaces of the laminated structure 93 on both sides thereof. A gate insulating film 86 made of SiO2 (silicon oxide) is formed on the surface (including the slopes 91) of the laminated structure 93. The gate insulating film 86 is provided with contact holes partially exposing the n-type GaN layer 85 and the n-type GaN layer 83 respectively. A source electrode 88 is formed on the n-type GaN layer 85 exposed from the corresponding contact hole. The source electrode 88 is electrically connected to the n-type GaN layer 85. On the other hand, drain electrodes 89 are formed on the n-type GaN layer 83 exposed from the corresponding contact holes. The drain electrodes 89 are electrically connected to the n-type GaN layer 83. Gate electrodes 87 are formed on the gate insulating film 86 in portions opposed to the slopes 91. Interlayer dielectric films 90 made of polyimide are interposed between the adjacent ones of the source electrode 88, the drain electrodes 89 and the gate electrodes 87, to isolate the same from one another.
In the field-effect transistor having the aforementioned structure, the gate insulating film 86 is formed by depositing SiO2 on the surface of the laminated structure 93 by a method utilizing plasma such as CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition) or ECR (Electron Cyclotron Resonance) sputtering, for example.
SiO2 employed for the gate insulating film 86 can reduce gate leakage current resulting from a tunnel effect. Therefore, SiO2 is preferably used as the material for a gate insulating film.
Around the surface of the laminated structure 93 made of GaN, however, nitrogen vacancies are formed due to the lack of nitrogen atoms (N atoms) of the GaN crystal lattice in the steps of forming the slopes 91 by the dry etching and forming the gate insulating film 86 with the plasma. Therefore, the surface level (interfacial level) density of the interface is increased on the interface between the surface of the laminated structure 93 and the gate insulating film 86 made of SiO2 containing oxygen as the main element, and a large number of surface charges (interfacial charges) are generated. When the surface level density of the interface between the surface of the laminated structure 93 and the gate insulating film 86 is increased, surface leakage current (off-leakage current) flowing on the surface of the laminated structure 93 is disadvantageously increased.